home Biological until 1854 Formalization 1854-1937 Revolutions 1937-1951 Electronic Age
Location: http://members.tripod.de/s_ulf/csh/revol.html & http://www.cs.mun.ca/~ulf/csh/revol.html. By Ulf Schünemann since 251198. Please mail any comments.

Comprehensive History of Information and Computing
1937-1951: The Computer Engineering Revolutions


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Overview

Time USA
(Bell)
Germany
(private)
USA
(Iowa)
$1000
UK
(Post/NPL)
USA
(Harvard)
$200,000++
for Mark I
USA
(Pennsylvania)
$486,804
$105,600++
USA
(IBM)
UK
(Manchester)
UK
(Cambridge)
Australia
(CSIRO)
USA
(commercial)
$930,000
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951

  
 
Model-K
...
CNC
remote
...
...

start
...
...
Z1,Z2
...
...
Z3
...
...
...
Z4
 
 
 
 
(Z4 in
use
)
idea
...
...
...
...
proto.
...
...
ABC

  
 
 
 
 
 
 
Heath Robinson
Colossus
Colossus II
   design
   ...
   ...
   ...
   redesign
   pilot ACE

 
proposal
...
...
...
...
...
...
...
Mark I
...
...
Mark II
...
...
...
Mark III

 
 
 
 
 
 
 
 
start
   followup
ENIAC
   delay lines
   ...
   ...
   ...
   EDVAC

 
 
 
 
 
 
 
 
 
 
 
 
...
SSEC

 
 
 
 
 
 
 
 
 
 
 
William's tube
...
Baby
Mark 1
...
Ferranti Mark

 
 
 
 
 
 
 
 
 
 
 
idea
...
...
EDSAC
...
LEO I

 
 
 
 
 
 
 
 
 
 
 
start
...
...
CSIRAC

 
 
 
 
 
 
 
 
 
 
 
start
...
...
(BINAC)
...
UNIVAC
[Attention: If the table is squeezed, line breaks in the table columns will move events to a later time!]

1937-1944: Race For First Binary and Electrical Computer

Developments brought, since 1937, the realization of the following inventions (made by Babbage, except for binary logic and the electrical technologies) necessary for true computers (with stored programs). Inventions not appearing in the first true computers: binary floating point numbers in Z3 and Stibitz's follow-ups (reappeared 1955 in IBM 704), arithmetic exceptions in Z2 and Stibitz's follow-ups[?], Z1's pipelining (reappears 1962 in the Atlas), and ENIAC's parallelism.
Note that the ENIAC was the first only in the category of parallelism, although not an interpreter, she was closest to being Turing-complete. Details of Z1-Z3 and ENIAC are below the table.
Project until 1939 1939-46 Technical Details
Model-K and Complex Number Calculator (CNC):
George Stibitz (1904-1995),
Bell Telephone Labs (USA)
calculator/interpreter for arithmetics
  • Nov 1937: Model-K, a two-digit adder, built on his own as proof of concept of electrical binary calculation: First relay and first binary-logic calculator [Mallock/with tubes].
  • Oct 1939: Complex Number Calculator operational for complex arithmetic. (later renamed the [Bell Labs] Model 1 Relay Computer). First electrical interpreter [general purpose?] [Z2/Z3]
  • 1940: world's first remote computing at conference, played with by Mauchly and Wiener.
    Several binary computers of greater sophistication followed.
    Machines extended to include tracking and aiming devices to be attached to anti-aircraft guns.
    In the follow-up after 1940 [when exactly?]: excess 3 code, floating decimal arithmetic, self-checking circuits, jump program instructions, taped programs and 'table-hunting' subcomputers.
    Model-K: «For example, if the two relays representing the numbers 3 and 6 were activated, this would activate another relay representing the number 9» [ref]
    CNC:
    1. Electro-magnetic: 450 relays + 10 crossbar switches.
    2. Binary fixed-point arithmetics (special encoding)
    3. Speed: 30 sec for quotient of two ``eight-place'' complex numbers.
    4. Memory: ?
    5. I/O: input on three teletypewriters
    6. Programming: arithmetic instructions from punched tape (no conditional jump) [ZZ].
    Z1, Z2, Z3, Z4:
    Konrad Zuse [ZZ] (since Z2 with help of Schreyer)
    Berlin (Germany)
    interpreters for engineering calculations
  • 1936-38: Z1 interpreter constructed in parent's living room: 1936: mechanical memory (16 numbers). 1938: mechanical control unit/ALU. First constructed (but unstably operating) interpreter.
  • 1938: Z2: with new, electro-magnetic control unit/ALU (200 relays, 16 bit fixed-point arithmetics). First operating interpreter [TM/CNC] (semi-electrical) and first general-purpose calculator
  • 1938: Start with the larger fully-relay Z3 while aircraft engineer at Henschel Aircraft Factory. Some financial support by the DVL (German Aircraft Research Institute).
  • 1941: Z3 interpreter [CNC/Mark] operational. Patent not accepted [MemZ].
  • [When?] Special-purpose 500-relays calculator with fixed sequence of operations for Henschel.
    Improved model with first[?] analog-to-digital sensors [not in use]
  • 1942: Start developing Z4 with vacuum tube technology besides his job.
  • Early 1945 operational [MemZ]. 28 April 1945 demonstrated at the Aerodynamics Research Insitute in Göttingen [MemZ]. First electronic interpreter [Mark I/Mark II] and first electronic general-purpose calculator
    Set up a "revamped" Z4 in full working order.
    1. Fom mechanical (Z1) to electronic (Z4). Z3: 600 relays for control unit/ALU + 1800 for memory.
    2. Binary interpreter. Z3: with 22bit floating-point arithmetics (1 bit sign + 7-bit exponent bits + 14-bit mantissa, including infinity):
    3. Speed: 3 sec for mult (5.33Hz).
    4. Memory: 64 numbers in RAM + 2 registers.
    5. I/O: number input by keyboard [Murray/Dvorak]; output by decimal digit lights.
    6. Programming with punched tape. 9 (Z1: 8) argument-less instructions (see below), no conditional jump/loop.
    ABC:
    John Vincent Atanasoff [biography]
    Iowa State Univ. (USA)
    processes systems of linear equations
    cost $1000
  • since 1935 ``working on a computing device''
  • 1937: the idea of regenerative memory and logic circuits
  • 1939: crude prototype developed with Clifford Berry: first electronic processor [TM/complete] (special-purpose).
  • Patenting process started but never completed.
  • 1941: Remington Rand turns Atanasoff down.
  • 1942: ABC (Atanasoff-Berry Computer) processor [proto/Colossus] completed.
    1. Electronic (with regenerative memory).
    2. Binary processor to add and subtract vectors (for Gausses elimination) with fixed-point arithmetics
    3. Speed: ?
    4. Memory: ?
    5. Architecture: separate data processing from memory.
    6. I/O: data entered on punch cards.
    7. Programming: physical [ZZ].
    Colossus:
    Tommy Flowers.
    Post Office Research Labs at Dollis Hill (London, UK)
    processes cipher text to find decryption keys
    funded by Bletchley Park (Foreign Office)
    secret until 1970 (75?).
    Poland develops an electromechanical device aiding in breaking German Enigma code.

    Bletchley Park: Turing[</>] mechanizes parts of the work of breaking Enigma code by the Bombe, a refinement of the Polish device.
    And the Tunny, a switchboard-like device, for decyphering German Lorenz SZ42 (fish) code once the setting was known for the message.

  • 1942: Flowers (Post Office) approached for technical assistance: Heath Robinson (24 tubes) combined with the "Tunny". Input: punched tape.
  • 1943: Flowers built Colossus (1500 tubes), an electronic special-purpose processor [ABC/II] with the first conditional branch. It found the Lorenz settings for the Tunny, replacing the Heath Robinson.
  • Feb 1944[?] Colossus Mark II processor [I/ENIAC] (2400 tubes) operational
    11 machines in operation; all but one disassembled after WWII; the last in operation until 1958. Original machine drawings burnt in 1960.
    1. Electronic: 1500-2500 tubes (power supplies +200V to -150V at up to 10A; consumption 4.5KWatt).
    2. Binary processor [Technical details [and the rebuilding project] for counting and 5-bit characters. «[I]t was a special-purpose machine», e.g. not capable of decimal multiplications.
    3. Speed: 5kHz clock.
    4. Memory: 20 decade counters + 5 characters in shift register.
    5. I/O: punched 5 hole paper tape (cipher text) read at 5,000 characters per second by optical reader. Typewriter output, buffered onto relays. [ITA2 code?]
    6. Programming by wireing/plugging. Conditional branch between alternative programmes depending on counter outputs.
    ASSC/Harvard Mark I [picture]:
    Howard Aiken (physicist),
    Harvard Univ. (USA)
    interpreter originally[?] for scientific calculations (nonlinear physical equations), later[?] to compute elements of mathematical and navigation tables
    funded by IBM (initially $200,000), later[?] sponsored by US Navy
  • 1936: Physics Dpt turns down Aiken propsal for a calculating machine. He is pointed to a donated copy of Babbage's Difference Engine.
  • 1937: IBM supports his proposed ASCC (Automatic Sequence Controlled Calculator), a calculater to carry out sequences of operations.
  • 1941: IBM joins the US war effort.
  • 1944: Univ. dedicates ASCC as Harvard Mark I, an interpreter [Z3/Z4] with the first software loops, used by US navy for gunnery and ballistics calculations.
  • 1944: Grace Hopper[>] the third programmer on the Navy's Mark I, pioneered library routines (c.f. libraries for the Analytical Engine).
  • Applications: integrals for optics, magnetic fields, radar, atomic bomb.
  • [1947: Mark II]
    1. Electro- mechanical/magnetic (Mark II is electronic): 35 tons; 500 miles of wire; 760,000 parts, including 2200 counter wheels, 3300 relay components.
    2. Decimal interpreter with fixed-point arithmetics. Compute to 23 significant figures.
    3. Speed: <1 sec for add, 6/12 sec for mult/div
    4. Memory: 72 storage registers.
    5. I/O: Number input on punched cards; output on punched cards or by electric typewriter.
    6. Programming with paper tape [picture]. 5 instructions (add, sub, mult, div, and reference to previous results -- stack-like?), libraries, no conditional jump, a kind of for-loop [ZZ]
    ENIAC (Electronic Numerical Integrator Analyzor and Computer):
    J Presper Eckert, John W. Mauchly,
    Moore School at Univ. of Pennsylvania (USA)
    processor for generating firing tables
    funded by US Army Ordnance Dpt (total $486,804)
    Mauchly saw the remote operation of the CNC 1940; and visited Atanasoff during the summer of 1941 to have a close look at the ABC.
  • 1943: Work on ENIAC started.
  • 1944: follow-up project planed to have mVon-Neumann architecture.
  • Dec 1945: ENIAC, the first parallel processor [Colossus/BINAC] solved first problem [ZZ].
  • Feb 1946: unveiled.
    1. Electronic: 18,000 tubes.
    2. Decimal processor with fixed-point arithmetics (10 decimal digits).
    3. Speed: 24 msec for div (60-125 kHz clock).
    4. Memory: 20 numbers in the adders + 10 central counters.
    5. I/O: on punched cards.
    6. Programming by wires. Conditional branch (partially), nested for-loops (examples: for-loop, nested for-loop).
    More technical details:

    1944-48: Race For First Stored Program Computer

    Architecture, 1944: Constructing ENIAC (started only one year earlier) brought new insight: a computer should be software programmable (be a interpreter). Around 1943 Mauchly and Eckert discussed the concept of a stored-program computer. 1944 the EDVAC was proposed [c.f. Difference Engine's construction leading to the idea of the Analalytical Engine]. After a meeting on the EDVAC design, Von Neumann writes a draft report describing the stored program concept, known as the Von Neumann architecture.
    True computers combine the previous inventions (e.g. they all have binary fixed point numbers) and have their program stored in internal memory. The latter allowed for self-modifying programs (until operating systems prohibted them). And it allowed for using the computer to translate assembly language programs (data) into machine language programs. Classically they are sequential. The Von Neumann architecture is Babbage's four-part architecture (store, ALU, and I/O and control unit) together with the stored program concept and sequential execution.
    Several projects tried to realize of this concept (see the first computers).
    Information & Communication Theory 1947/48
    • 1947: Norbert Wiener's [>] "Cybernetics -- or Control and Communication in the animal and the machine" generalizes information processing and control of processes in organisms and machines [Math].
    • Harold Lasswell's (US, political scientist) model of the communication process [Sem]
    • R W Hamming's (Bell) Error-correcting encoding: check-bits in binary messages.
    • Meaning, 1948 [<>]: Shannon's [<>] (Bell) Information Theory: encoding of information by sender, transmission in channel (with limited capacity and noise) then decoding by receiver [Sem]
    • 1948: Warren Weaver applies this model to human communication [Sem]
    cf. cybernetical models 1953/54.

    1948-51: Race For First Commercial Computers

    One problem in realizing the stored program concept was to built a fast memory. There were two competing approaches:
    Project 1944-48 1948-51: Commercialization Technical Details
    Baby, Manchester Mark, Ferranti Mark [incl. all(?) the historical documents]
    Frederic C Williams and Tom Kilburn
    Manchester Univ. (UK)
  • Fall 1946: Williams demonstrates the ``Williams tube'', a (single) CRT to store a single binary digit, allowed fast random access to short strings of bits ("words") in RAM.
  • Fall 1947: successfully stored 2048 digits: alter bits at the rate of around 1 a second.
  • Built a computer around the storage ``for demonstration''.
  • 21 June 1948: The Manchester Small Scale Experimental Machine ``Baby'' executs highest-factor program -- world's first operating electronic stored-program computer. [simulator (download)]
  • Late 1948 to late 1949: Manchester Mark 1 constructed in 3 stages with more manpower (including, Sep 1948, Max Newman and Turing[</>])
    Used in the investigation of the Riemann hypothesis and calculations in optics.
  • 1948-Feb 1951: Ferranti's Ferranti Mark 1 (based on Manchester Mark 1) delivered to Manchaster Univ. -- world's first commercially available computer to be delivered.
  • 1951: Turing's [<] Programmers' Handbook for the Ferranti Mark 1 ("Mark II")

  • Storage: RAM in cathode ray tubes (Baby: 32 32-bit words; Ferranti: 256 40-bit words), and as as backing store a magnetic drum (Ferranti: 16,000 words) .
    Speed: Baby: 1.2 ms per instruction, highest factor of 218 in 52 minutes.
    I/O: keyboard to poke into memory [Dvorak/Dvorak], output on display tubes.
    Programming:
  • Baby: 7 instructions (RISC): first indirect jump (relative and absolute).
  • Ferranti: 51 instructions (incl. bit-wise and/or/nxor, unsigned and 2-complement signed arithm. ops.) programming it (conventions for function calls, library for floating point operations)
  • SSEC (Selective Sequence Electronic Calculator):
    IBM
    27 Jan. 1948: IBM's electromechanical SSEC runs a memory stored program -- first computer that can modify a stored program.
    [not a stored program computer???]
      Size: more than 12,000 vacuum tubes and 21,000 relays.
    EDSAC and LEO:
    Maurice Wilkes[>]
    Cambridge Univ. (UK)
  • 1946: Wilkes learned about ENIAC and EDVAC plan.
  • Oct 1947: Lyons & Co, a British catering company, decided to computerise its commercial operations. 1949: the project was named Lyons Electronic Office (LEO).
  • May 6, 1949 EDSAC runs first program, computing a table of squares [log book entry].
  • LEO based on EDSAC, started before EDSAC finished.
  • 1951: LEO I computer was operational and ran the world's first regular routine office computer job.
  • Leo II's 1957-61, Leo III's 1962-79.
    [LEO photographs].
    LEO merged with other companies, 1968 renamed to ICL.
  • EDSAC: Storage: 16 mercury acoustic delay lines each holding 16 35-bit words or 32 17-bit instructions.
    binary integer numbers, conditional jumps [ZZ].
    I/O (LEO): 5-bit paper tape for sequences of numbers 0..11[!]
    [simulator, for MSDOS, Windows 95, NT, Mac].
    CSIRAC:
    Trevor Pearcey
    CSIRO (Australia)
    1946: CSIRAC (CSIR Mark I) design started (after having seen Aiken's Mark I at Harvard, 1945)
  • late Nov 1949: first test program executed
  • 1951: publicly demonstrated
  • Design (comparison with 1996 PC): 2000 tubes, serial, 20-bit words, storage delay lines each held 16 such words serially, registers...
    Instruction set: 5-bit "destination" + 5-bit "source" + 10-bit "address" (1024 combinations)
    [Java online simulator]
    EDVAC:
    John Von Neumann [biography]
    Univ. of Pennsylvania (USA)
    1944-50: EDVAC, a follow-on contract to ENIAC by the US Army (initially $105,600). After a meeting about the EDVAC design Von Neumann writes a draft report describing the stored program concept [known as the Von Neumann architecture].
  • 1946: mercury acoustic delay memory completed.
  • 1950 completed by the research group of Von Neumann.
  • Oct 1951 first application program run
  • 1952: ``completed''[?]
  • Storage: 1024 44-bit words in 120 mercury acoustic delay lines. Access to a random word took up to 384 microsec.
    ACE:
    Alan Turing[</>], Harry Huskey
    National Physical Laboratory NPL (UK)
  • 1945-47: Turing's original, ambitious design for the Automatic Computing Engine (ACE).
  • Turing leaves after task of constructing ACE is given to another dpt.
  • 1949: Harry Huskey designes Pilot ACE based on Turing's ACE
  • 1950: Pilot ACE completed.
  • Games, 1951: Christopher Strachey[>] started to write a draughts program[>] for the Pilot ACE.
  • Storage: 200 mercury acoustic delay lines @ 1024 bits. Max possible wait: 50,000 microsec.
    I/O (in the English Electric Deuce, commercial successor of NLP's ACE): 5-bit paper tape: letter-table + numbers 0..19[!]
    SEAC/SWAC:
    Sam Alexander (SEAC), Harry Huskey (SWAC)
    National Bureau of Standards (USA)
    .
  • 1949: National Bureau of Standards decides to build a computer each in the east and west coast centers: SEAC and SWAC.
  • 1950 SEAC (Standards Eastern Automatic Computer) completed [CC].
  • The SEAC design was an attempt in the direction of ``HLPL computers'' (high level machine language) [CC].
    UNIVAC:
    J. Presper Eckert, John W. Mauchly
    own company/Remington Rand (USA)
    Total construction cost about $930,000.
  • 1946-51 after the ENIAC project, Eckert and Mauchly establish the Electronic Control Company, and get a contract by the Census Bureau (supported with $300,000 by the Ordnance Dpt).
  • 1948: design contract at fixed fee of $169,600.
  • 1949: BINAC (Binary Automatic Computer) for Northrup Aviation, a processor [<] with magnetic tape to store data, for floating decimal computation [HPL:H]
  • 1949: Short Code: see below
  • 1949: joined by Hopper[</>]
  • 1950: sold company to Remington Rand (the later Sperry Rand, later merged with Burroughs to Unisys).
  • March 1951: Census Bureau accepted UNIVAC (Universal Automatic Computer).
  • June 1951: delievered first UNIVAC I, and more. 46 units, in use until 1959.
  • UNIVAC: Size: 5,4000[!] tubes.
    Speed: 2.25 MHz clock, division in 3.89 ms.
    Storage: 1,000 words in mercury delay-lines.
    I/O: digital magnetic tape, typewriter, cards, printer.

    Baby's programming model: accumulator and program counter. Initially 7 instructions with 3-bit (Ferranti Mark: 6-bit) function + 13-bit address field:
    fetch negative[!] from addr (- mem[addr]); sub mem[addr] from accu; store to addr; if accu negative, skip next instruction; jump to mem[addr]; jump plus mem[addr]; halt.

    In the same periode the following also happened:


    home Biological until 1854 Formalization 1854-1937 Revolutions 1937-1951 Electronic Age references
    Location: http://members.tripod.de/s_ulf/csh/revol.html & http://www.cs.mun.ca/~ulf/csh/revol.html. By Ulf Schünemann since 251198. Please mail any comments.